__Book Chapters__

[B1]. ** A. Antonopoulos**, C. Kapatsori, Y. Makris, "Hardware Trojans in Analog, Mixed-Signal and RF ICs," in The Hardware Trojan War: Attacks, Myths, and Defenses by Swarup Bhunia and Mark Tehranipoor, Springer, 2018.

__Journals__

[J1]. K. S. Subramani, **A. Antonopoulos**, A. Abotabl, A. Nosratinia, Y. Makris, "Demonstrating and Mitigating the Risk of a FEC-based Hardware Trojan in Wireless Networks", IEEE Trans. on Information Forensics and Security, accepted.

[J2]. **A. Antonopoulos**, C. Kapatsori, Y. Makris, "Trusted Analog/Mixed-Signal/RF ICs: A Survey and a Perspective", IEEE Design & Test, vol. 34, No. 6, pp. 63-76, 2017.

[J3]. G. Volanis, **A. Antonopoulos**, A. Hatzopoulos, Y. Makris, "Towards Silicon-Based Neuoromorphic ICs - A Survey", IEEE Design & Test, Vol. 33, No. 3, pp. 91-102, 2016.

[J4]. **A. Antonopoulos**, M. Bucher, K. Papathanasiou, N. Makris, N. Mavredakis, R. K. Sharma, P. Sakalas, M. Schroter, "Modeling of High Frequency Noise of Silicon MOS Transistors for RFIC Design", International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, special issue on Modeling of high-frequency silicon transistors, Vol. 27, No. 5-6, pp. 802-811, 2014.

[J5]. W. Grabinski, M. Brinson, P. Nenzi, F. Lannutti, N. Makris, **A. Antonopoulos**, M. Bucher, "Open source circuit simulation tools for RF compact semiconductor device modelling", International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, special issue on Modeling of highfrequency silicon transistors, Vol. 27, No. 5-6, pp. 761-779, 2014.

[J6]. **A. Antonopoulos**, M. Bucher, K. Papathanasiou, N. Mavredakis, N. Makris, R. K. Sharma, P. Sakalas, M. Schroter, "CMOS Small-Signal and Thermal Noise Modeling at High Frequencies", IEEE Trans. Electron Devices, Vol. 60, No. 11, pp. 3726-3733, 2013.

__Conferences__

[C1]. G. Volanis, Y. Lu, S. Nimmalapudi, **A. Antonopoulos**, A. Marshall and Y. Makris, "Analog Performance Locking through Neural Network-Based Biasing", to appear in IEEE VLSI Test Symposium (VTS), 2019.

[C2]. C. Kapatsori, Y. Liu, **A. Antonopoulos**, and Y. Makris, "Hardware Dithering: A Run-Time Method for Trojan Neutralization in Wireless Cryptographic ICs" in IEEE International Test Conference (ITC), 2018, pp. 1-7.

[C3]. K. S. Subramani, **A. Antonopoulos**, A. Abotabl, A. Nosratinia, and Y. Makris, "ACE: Adaptive Channel Estimation for Detecting Analog/RF Trojans in WLAN Transceivers," in IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2017, pp. 722-727.

[C4]. **A. Antonopoulos**, C. Kapatsori, Y. Makris, "Security and Trust in the Analog/Mixed-Signal/RF Domain: A Survey and a Perspective," in IEEE European Test Symposium (ETS), 2017, pp. 1-10.

[C5]. K. S. Subramani, **A. Antonopoulos**, A. Abotabl, A. Nosratinia, and Y. Makris, "INFECT: INconspicuous FEC-based Trojan: a Hardware Attack on an 802.11a/g Wireless Network," in IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2017 , pp. 90-94.

[C6]. Y. Lu, G. Volanis, K. S. Subramani, **A. Antonopoulos**, and Y. Makris, "Knob Non-Idealities in Learning-Based Post-Production Tuning of Analog/RF ICs: Impact & Remedies," in Design, IEEE VLSI Test Symposium (VTS), 2017, pp. 1-6.

[C7]. M.-M. Bidmeshki, **A. Antonopoulos**, and Y. Makris, "Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP," in Design, Automation and Test in Europe Conference (DATE), 2017, pp. 1703-1708.

[C8]. G. Volanis, D. Maliuk, Y. Lu, K. S. Subramani, **A. Antonopoulos**, Y. Makris, "On-Die Learning-Based Self-Calibration of Analog/RF ICs," IEEE 34th VLSI Test Symposium (VTS), 2016, pp. 1-6.

[C9]. K. Papathanasiou, N. Makris, **A. Antonopoulos**, M. Bucher, "Moderate inversion: analog and RF benchmarking of the EKV3 compact model", 29th International Conference on Microelectronics (MIEL), 2014, pp. 205-208.

[C10]. **A. Antonopoulos**, M. Bucher, K. Papathanasiou, N. Makris, R. K. Sharma, P. Sakalas, M. Schroter, "CMOS RF Noise, Scaling, and Compact Modeling for RFIC Design," IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2013, pp. 53-56.

[C11]. R.K Sharma, **A. Antonopoulos**, N. Mavredakis, M. Bucher, "Impact of Design Engineering on RF Linearity and Noise Performance of Nanoscale DG SOI MOSFETs," 14th International Conference on Ultimate Integration on Silicon (ULIS), 2013, pp. 145-148.

[C12]. **A. Antonopoulos**, K. Papathanasiou, M. Bucher, K. Papathanasiou, "CMOS LNA Design at 30 GHz - A Case Study", 8th International Caribbean Conference on Devices Circuits and Systems (ICCDCS), 2012, pp.1-4.

[C13]. R. K. Sharma, **A. Antonopoulos**, N. Mavredakis, M. Bucher, "Analog/RF Figures of Merit of Advanced DG MOSFETs", 8th International Caribbean Conference on Devices Circuits and Systems (ICCDCS), 2012, pp.1-4.

[C14]. N. Mavredakis, **A. Antonopoulos**, M. Bucher, "Measurement and Modelling of 1/f Noise in NMOS and PMOS Devices", 5th European Conference on Circuits and Systems for Communications (ECCSC), 2010, pp.86-89.

[C15]. N. Mavredakis, **A. Antonopoulos**, M. Bucher, "Bias Dependence of Low Frequency Noise in 90nm CMOS", Workshop on Compact Modeling, Micro-Nanotech, 2010, pp. 805-808.

[C16]. **A. Antonopoulos**, N. Mavredakis, N. Makris, M. Bucher, "System Level Analysis of a Direct Conversion WiMAX Receiver at 5.3 GHz and Corresponding Mixer Design", 15th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES), 2008, pp. 291-296.

__Workshops__

[W1]. K. S. Subramani, **A. Antonopoulos**, A. Nosratinia, Y. Makris, "Hardware-Induced Security and Privacy Vulnerabilities in the Internet of Things", IEEE End to End Trust and Security Workshop for the Internet of Things, Washington DC, 2016.

[W2]. M. Bucher, **A. Antonopoulos**, "Compact modeling of advanced bulk CMOS using EKV3-linearity, RF and noise performance trends", Physics-based nonlinear compact transistor modeling for mm-wave applications Workshop, International Microwave Symposium (IMS), Florida, 2014.

[W3]. M. Bucher, **A. Antonopoulos**, "Compact modelling of RF small-signal and noise performance with EKV3 MOS transistor model", Modeling of Systems and Parameter Extraction Working Group (MOS-AK) Workshop, London, 2014.

You can also visit my Google Scholar page.