Research Students

Doctoral Dissertations

• Sneha Thakur: “In progress,” Ph.D. EE

• Hesam Nourmohamadi: “In progress,” Ph.D. EE.

• Vaibhav Pawaskar: “In progress,” Ph.D. EE (co-chair with Dr. Gohil)

• Prashant Buck: “Phase Current Reconstruction and Peak Prediction for Switched Reluctance Generators,” Ph.D. EE, 2019

• Devendra Patil: “Dynamic Wireless Power Transfer for Electric Vehicles,” Ph.D. EE, 2019

• Sameer Arora: “Nonlinear Phenomenon and Efficient Nonlinear Control Techniques for DC-DC Power Converters,” Ph.D. CE (co-chair with Dr. Bhatia), 2017

• Sharath Srinivasan: “Low-Power Techniques for Resolution and Frequency-Reconfigurable Data Conversion for Sensor-based Applications,” Ph.D. EE, 2017

• Vikas Paduvalli: “Techniques for Efficient Control of Power Converters,” Ph.D. EE, 2016

• Imran Bashir: “A Digitally Controlled Wide-Band Frequency Modulator,” Ph.D. EE, 2014

• Shanmuganand Chellamuthu: “Design Challenges of a Battery Operated Integrated Power System Module,” Ph.D. EE (co-chair Dr. Banerjee), 2014.

• Sujan K. Manohar: “Techniques for Efficient Power Management,” Ph.D. EE, 2013

• Essam S. Atalla: “System Design and Analysis of Contemporary Direct-Conversion Receivers,” Ph.D. EE, 2013

• Rama Venkatasubramaniam: “Energy Efficient Circuit Design using Nano-electromechanical Relays,” Ph.D. EE, 2012

• Sankalp Modi: “RF Power Amplifier Efficiency Improvement Using Baseband Look-ahead Window,” Ph.D. EE, 2012

• Aditya Awasthi: “Alien Interference Mitigation for Copper-Based Digital Subscriber Lines: Algorithm and VLSI Architecture,” Ph.D. EE, 2012

• Jaimin Mehta: “A Digitally-Intensive Amplitude Modulator for a Polar EDGE Transmitter,” Ph.D. EE, 2011

• Naveen Yanduru: “RF Receiver Front-Ends in Deep Sub-micron CMOS for Mobile Terminals,” Ph.D. EE, 2011

• Ioannis Syllaios: “Design of Digital-Centric Polar Modulation Transmitters for High-Data Rate Communications,” Ph.D. EE, 2010

• Venkatesh Acharya: “Linearization and Applications of the CMOS QUAD,” Ph.D. EE (co-chair with Dr. Banerjee), 2009

• Oren Eliezer: “A Phase Domain Approach for Mitigation of Self-Interference in a Transmitter,” Ph.D. EE, 2008

• Viral Parikh: “All Digital Quadrature Modulator for Wideband Wireless Transmitters,” Ph.D. EE, 2008

• Chitaranjan K. Singh: “Design of High Performance MIMO Receiver: Algorithms and VLSI Architectures,” Ph.D. EE, 2008

• Raghunath Cherukuri: “Code-Aided Adaptive Decorrelator for IQ Imbalance Compensation Iterative Receivers,” Ph.D. EE, 2008

• Imtinan Elahi: “Robust Receiver Design Using Digitally Intensive Techniques to Overcome Analog Impairments,” Ph.D. EE, 2005

• Sharath Prasad: “Switch Algorithms and Architectures for Flow Control of the Available Bit Rate ATM Service,” Ph.D. EE, 2005

• NS Nagaraj:  “Interconnect Modeling, Signal Integrity and Reliability Analysis for Deep Sub-micron Integrated Circuits,” Ph.D. EE, 2003

• Robert B. Staszewski: “Digital Deep-Submicron CMOS Frequency Synthesis for RF Wireless Applications,” Ph.D. EE, 2002 (Best Doctoral Dissertation Award)

• Uming Ko:  “Techniques for the Design of Low Power Processors,” Ph.D. EE, 1996.

Master's Thesis

• Abhishek Krishnamurthy: “CMOS Implementation of Adaptive Input-Output Linearization Technique for a Boost DC-DC Converter,” M.S.E.E, Thesis, 2017.

• Koushik Vaithyanathan: “Digital Signal Control of Feedback Linearized DC-DC Converters,” M.S.E.E, Thesis, 2011

• Genesis Carr: “Delay Line Based CMOS Analog to Digital Converter,” M.S.E.E. Thesis, 2011

• Swarup Doshi: “Analysis of Feedback Linearized DC-DC Boost and Buck-Boost Converters,” M.S.E.E. Thesis, (co-chair with Dr. Bhatia), 2011

• Sunilduth Kanigere: “Analysis and Implementation of Current Mode Analog Fourier Transform,” M.S.E.E. Thesis, 2010.

• Durga Prasad:  “SIMD Based Baseband Processor for CORDIC Algorithms,” M.S.E.E. Thesis, (co-chair) 2010

• Vinod Somasundar: “A Reconfigurable FFT Architecture for OFDM Based Wireless Standards,” M.S.E.E. Thesis, 2009.

• Mangesh Kunchamwar:  “Design of Application Specific Instruction Accelerators for Multi-Standard Channel Decoding,” M.S.E.E. Thesis (co-chair with Dr. Sangireddy), 2009

• Lisha Kachhadia:  “Design and Implementation of a Feedback Linearized DC-DC Buck-Boost Power Converter,” M.S.E.E. Thesis, 2009

• Mayank Bhatnagar:  “Implementing Single Electron Device in Standard CMOS Process,” M.S.E.E. Thesis, 2008.

• Imran Bashir:  “On Chip Calibration and Compensation Techniques for Wireless SoCs,” M.S.E.E. Thesis, 2008

• Aditya Awasthi: “Decision-Aided Baseband Compensation for Phase Noise in Wireless OFDM Systems,” M.S.E.E. Thesis, 2008.

• Arunkumar Ravi: “A Wavelet Based Low Power H.264 Encoder and Decoder,” M.S.E.E. Thesis, 2008

• Venkata Srinivasan:  “VLSI Architectures for LDPC,” M.S.E.E. Thesis, 2007.

• Dhaval Shah:  “Digital Controller for DC-DC Boost Converter,” M.S.E.E. Thesis, 2007.

• Srinivas Swaminathan: “Probabilistic Analysis of Noise Effects in Digital Circuits,” M.S.E.E. Thesis, 2007

• Rahul Prakash: “Phase Noise Reduction of High Speed Frequency Dividers in Deep Sub Micron CMOS,” M.S.E.E. Thesis, 2006.

• Dheera Balasubramanian: “Memory module for network on chip architecture,” M.S.E.E. Thesis, 2006.

• Sushma H. Prasad: “Efficient VLSI Architectures for Matrix Inversion with Application to MIMO Systems,” M.S.E.E. Thesis, 2006

• Aleksander Wolfe: “An Exploration of an FPGA Based Impulse Radio Transceiver for UWB Communications,” M.S.E.E. Thesis, 2005

• Rama Venkatasubramaniam: “Architectures for High Precision Time to Digital Conversion,” M.S.E.E. Thesis, 2005.

• Kutral Veerabhadaran: “Low Leakage Logic Block Architecture for Field Programmable Gate Arrays,” M.S.E.E. Thesis, 2005.

• Magesh Hariharan:  “A Cache Architecture for IP Forwarding Engines,” M.S.E.E. Thesis, 2005.

• Nirav Ginwalla:  “Block Interleaver / Deinterleaver Architectures for Multiple Wireless Standards,” M.S.E.E. Thesis, 2005

• Chitra Sundaram:  “Effects of Process Variations on High Speed Digital Designs in Sub-100 Nanometer Technologies,” M.S.E.E. Thesis, 2005

• Srinivas Samudrala:  “Application Interface for a Network on Chip Architecture,” M.S.E.E. Thesis, 2004

• Ramprasath Vilangudipitchai:  “Low Power Solutions for Nanometer Technologies,” M.S.E.E. Thesis, 2004.

• Sumanth Gururajarao:  “Low Leakage Solutions for Ultra Deep-submicron CMOS,” M.S.E.E. Thesis, 2003.

• Prashanth Vallur:  “High Speed Pipelined Adder Circuits in Deep Sub-micron CMOS,” M.S.E.E. Thesis, 2002.

• Laxmikantha Holla:  “SOI CMOS Circuits for DSP Applications,” M.S.E.E. Thesis, Dec. 2002

• Aravind Navada:  “Synchronous and Self-timed High Speed Arithmetic Circuits,” M.S.E.E. Thesis, 2001.

• Shashank Shastry:  “Design and Evaluation of TSPC Based High Speed CMOS Circuits,” M.S.E.E. Thesis, 2000.

• Hrishikesh Pai:  “A Low Power Programmable Multiplier,” M.S.E.E. Thesis, 1998.

• Abhijeet Chachad:  “QMOS Multiple Valued Logic Design,” M.S.E.E. Thesis, 1997.

• Kamal Koshy:  “QMOS Digital Logic Circuits,” M.S.E.E. Thesis, 1997.

• Vijayanand Angarai:  “Number Representation Schemes for Energy Efficient Computer Arithmetic,” M.S.E.E. Thesis, 1996.

• Pius Ng:  “High Performance CMOS Differential Circuits,” M.S.E.E., 1994.

• Rekha Suryanarayana:  “A VLSI Architecture for an Information Dispersal Algorithm” M.S.E.E. Thesis, 1993.

• Manisha Agarwala:  “Application Specific Enhancement of FPGA Architectures,” M.S.E.E. Thesis, 1992.