Short Biography

Yiorgos is a professor in the Electrical and Computer Engineering department at the Erik Jonsson School of Engineering & Computer Science at The University of Texas at Dallas, since July 2011. Prior to joining UT Dallas, he spent 10.5 years as a faculty of Electrical Engineering and of Computer Science at Yale University. He holds a Ph.D. (2001) and an M.S. (1997) in Computer Engineering from the University of California, San Diego, and a Diploma of Engineering (1995) in Computer Engineering and Informatics from the University of Patras, Greece.

At UT Dallas, he leads the Trusted and RELiable Architectures (TRELA) Research Laboratory. His main research interests lie in the application of machine learning and statistical analysis in the design of trusted and reliable integrated circuits and systems, with particular emphasis in the analog/RF domain. He is also investigating hardware-based malware detection, forensics and reliability methods in modern microprocessors, as well as on-die learning and novel computational modalities using emerging technologies. His research activities have been supported by NSF, SRC, ARO, AFRL, DARPA, Boeing, IBM, LSI, Intel, AMS, Advantest and TI.

He served as the 2016-2017 general chair and the 2013-2014 program chair of the IEEE VLSI Test Symposium as well as the 2010-2012 program chair of the Test Technology Educational Program (TTEP). He is as an associate editor of the IEEE Transactions on Information Forensics and Security, the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, the IEEE Design & Test periodical and the Springer Journal of Electronic Testing: Theory and Applications. He has also served as a guest editor for the IEEE Transactions on Computers and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and as a topic coordinator and/or program committee member for several IEEE and ACM conferences. He is a Senior Member of the IEEE, a recipient of the 2006 Sheffield Distinguished Teaching Award and a recipient of the Best Paper Award from the 2013 Design Automation and Test in Europe (DATE'13) conference and the 2015 VLSI Test Symposium (VTS'15).

Contact Information:

Mailing Address:
ECE Department
Mailstop: EC33
UT Dallas
800 W. Campbell Rd.
TX 75080-3021

Office Location:
ECSN 4.914

Office Hours:
By Appointment

TRELA Lab Location:
ECSN 4.618 &
ECSN 4.624

+1 (972) 883-4360

+1 (972) 883-2710



Latest News:

2/18 - Advantest Gift: $40K to support research in Machine Learning-Based Test
1/18 - Editorial Board: Prof. Makris joins the IEEE TCAD Editorial Board in the area of Hardware Security
12/17 - NSF Award: $15K for Planning I/UCRC: Hardware and Embedded System Security and Trust
9/17 - DARPA Award: $635K for project "ECLIPSE: Efficient Cross-Layer IP Protection SchemE"
more news...