Short Biography

Yiorgos is a professor in the Electrical and Computer Engineering department at the Erik Jonsson School of Engineering & Computer Science at The University of Texas at Dallas, which he joined in July 2011. Prior to that, he spent 10.5 years as a faculty of Electrical Engineering and of Computer Science at Yale University. He holds a Ph.D. (2001) and an M.S. (1997) in Computer Engineering from the University of California, San Diego, and a Diploma of Engineering (1995) in Computer Engineering and Informatics from the University of Patras, Greece.

Yiorgos is a Co-Founder and Site-PI of the NSF Industry University Cooperative Research Center on Hardware and Embedded System Security and Trust (NSF CHEST I/UCRC), as well as the Leader of the Safety, Security and Healthcare Thrust of the Texas Analog Center of Excellence (TxACE) and the Director of the Trusted and RELiable Architectures (TRELA) Research Laboratory. His main research interests lie in the applications of machine learning and statistical analysis in the design of trusted and reliable integrated circuits and systems, with particular emphasis in the analog/RF domain. He is also investigating hardware-based malware detection, forensics and reliability methods in modern microprocessors, security primitives in synthetic biology, as well as on-die learning and novel computational modalities using emerging technologies. His research activities have been supported by NSF, SRC, ARO, AFRL, AFWERX, DARPA, DoE/Honeywell, Boeing, Northrop Grumman, KBR/Wyle, IBM, LSI, Intel, AMS, Advantest, Qualcomm and TI.

Yiorgos served as the 2016-2017 general chair and the 2013-2014 program chair of the IEEE VLSI Test Symposium as well as the 2010-2012 program chair of the Test Technology Educational Program (TTEP). He also serves or has served as an associate editor of the IEEE Transactions on Information Forensics and Security, the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, the IEEE Design & Test periodical and the Springer Journal of Electronic Testing: Theory and Applications. He has also served as a guest editor for the IEEE Transactions on Computers and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and as a topic coordinator and/or program committee member for several IEEE and ACM conferences. He is a Senior Member of the IEEE, a recipient of the 2006 Sheffield Distinguished Teaching Award, a recipient of the Best Paper Award from the 2013 Design Automation and Test in Europe (DATE'13) conference and the 2015 VLSI Test Symposium (VTS'15), a recipient of the Best Hardware Demonstration Awarfd from the 2016 and 2018 Symposia on Hardware Oriented Security and Trust (HOSTí16 and HOSTí18), and a recipent of the 2020 Faculty Research Award from the Erik Jonsson School of Engineering and Computer Science at UT Dallas.

Contact Information:

Mailing Address:
ECE Department
Mailstop: EC33
UT Dallas
800 W. Campbell Rd.
TX 75080-3021

Office Location:
ECSN 4.914

Office Hours:
By Appointment

TRELA Lab Location:
ECSN 4.618 &
ECSN 4.624

+1 (972) 883-4360

+1 (972) 883-2710



Administrative Assistant:
Mr. Charles Pao


+1 (972) 883-4936

+1 (972) 883-2710

Latest News:

7/20 - TI/TxACE Award: $230K for project "Machine Learning-Based Overkill/Underkill Reduction in Analog/RF IC Testing"
6/20 - NSF CHEST I/UCRC Projects: $275K to support four projects in Hardware and Embedded System Security and Trust
5/20 - Ph.D. Defenses: Dr. Gaurav Rajavendra Reddy and Dr. Georgios Volanis successfully defended their Ph.D. Theses
4/20 - Erik Jonsson School Faculty Research Award: Prof. Makris recognized for Outstanding Research Contributions
3/20 - AFRL/Northrop Grumman Project: $1.5M for Developing Integrated Circuit Provenance Attestation Methods
2/20 - DARPA/Synopsys: $800K for Automatic Implementation of Secure Systems (AISS)
more news...